Proxelera’s unmatched expertise in VLSI design is expanding into new frontiers in the international market. Our business operations are making an entry into the Israeli market aggressively, heralding a new milestone. In this regard, we have signed up with the Israeli company, TechLink Global Ltd, based out of Tel Aviv.
TechLink, headed by its president Mr Motty Houli, will be our representative in Israel. We are confident that this venture will be profitable in more ways than one for both partners. Proxelera’s presence in one of the most technologically advanced countries in the world stands as a testimony to our technical prowess in the VLSI and semiconductor `industry. India has a multi-faceted, strategic partnership with Israel across many sectors, and this new business nexus takes our aim of strengthening both the semiconductor technology & the ecosystem to new heights.

We are currently looking for hashtag<a href="https://www.linkedin.com/feed/hashtag/?keywords=fpga&amp;highlightedUpdateUrns=urn%3Ali%3Aactivity%3A7246754688371503104" rel="noopener noreferrer" target="_blank">hashtag</a><a href="https://www.linkedin.com/feed/hashtag/?keywords=fpga&amp;highlightedUpdateUrns=urn%3Ali%3Aactivity%3A7246754688371503104" rel="noopener noreferrer" target="_blank">#FPGA</a> Engineers for hashtag<a href="https://www.linkedin.com/feed/hashtag/?keywords=hyderabad&amp;highlightedUpdateUrns=urn%3Ali%3Aactivity%3A7246754688371503104" rel="noopener noreferrer" target="_blank">hashtag</a><a href="https://www.linkedin.com/feed/hashtag/?keywords=hyderabad&amp;highlightedUpdateUrns=urn%3Ali%3Aactivity%3A7246754688371503104" rel="noopener noreferrer" target="_blank">#Hyderabad</a>. JD:·&nbsp;&nbsp;Strong understanding of FPGA flow, Logic design, Digital design etc..&nbsp;&nbsp;Expertise hashtag<a href="https://www.linkedin.com/feed/hashtag/?keywords=rtlcoding&amp;highlightedUpdateUrns=urn%3Ali%3Aactivity%3A7246754688371503104" rel="noopener noreferrer" target="_blank">hashtag</a><a href="https://www.linkedin.com/feed/hashtag/?keywords=rtlcoding&amp;highlightedUpdateUrns=urn%3Ali%3Aactivity%3A7246754688371503104" rel="noopener noreferrer" target="_blank">#rtlcoding</a> in Verilog, System Verilog or VHDL.&nbsp;&nbsp;Knowledge in Xilinx FPGA architecture·&nbsp;&nbsp;Good to have experience in Vivado·&nbsp;&nbsp;Good Knowledge in Tcl, Python scripting Exp: 1 - 2 YrsNP: Immediate only Interested candidates connect me or hashtag<a href="https://www.linkedin.com/feed/hashtag/?keywords=email&amp;highlightedUpdateUrns=urn%3Ali%3Aactivity%3A7246754688371503104" rel="noopener noreferrer" target="_blank">hashtag</a><a href="https://www.linkedin.com/feed/hashtag/?keywords=email&amp;highlightedUpdateUrns=urn%3Ali%3Aactivity%3A7246754688371503104" rel="noopener noreferrer" target="_blank">#email</a> your resumes to <a href="mailto:madhu.priya@proxelera.com" rel="noopener noreferrer" target="_blank">madhu.priya@proxelera.com</a> &amp; share across the people you know who could be interested and would fit for this opportunity.

Company OverviewProxelera’s unmatched expertise in VLSI design is expanding into new frontiers in the international market. Our business operations are making an entry into the Israeli market aggressively, heralding a new milestone. Proxelera’s presence in one of the most technologically advanced countries in the world stands as a testimony to our technical prowess in the VLSI and semiconductor industry. The company headquarters is located in Bangalore, and we have 51-200 employees. Visit <a href="https://proxelera.com/" rel="noopener noreferrer" target="_blank">our website</a> for more information. Job OverviewWe are looking for a Senior Lead ASIC Engineer to join our team at Proxelera. This is a full-time, mid-level position based in Bengaluru, Hyderabad. The candidate must have a minimum of 4 years of relevant work experience in ASIC design and related fields. Qualifications and Skills<ul><li>Strong experience in ASIC Design (Mandatory skill).</li><li>Proficiency in ethernet protocols (Mandatory skill).</li><li>Advanced skills in RTL coding (Mandatory skill).</li><li>Experience and knowledge of RTL Synthesis techniques and optimization.</li><li>Expertise in Timing Closure, with a strong ability to analyze timing reports and issue resolution.</li><li>Proficiency in lint checking, with experience in handling complex designs.</li><li>Experience with Clock Domain Crossing (cdc) methodologies.</li><li>Familiarity with spyglass for design rule checking and optimization.</li></ul> Roles and Responsibilities<ul><li>Lead the design and development of ASIC components, ensuring they meet performance and quality standards.</li><li>Collaborate with cross-functional teams to define and implement designs that align with project specifications.</li><li>Perform RTL coding, synthesis, and design optimization to achieve desired design goals.</li><li>Address timing closure issues and optimize design for performance and power.</li><li>Conduct lint checks and ensure the integrity and consistency of design.</li><li>Implement and validate Clock Domain Crossing (cdc) procedures.</li><li>Utilize spyglass and other tools for rule checking and design validation.</li><li>Act as a mentor to junior engineers and provide guidance as required.</li></ul>

Company OverviewProxelera’s unmatched expertise in VLSI design is expanding into new frontiers in the international market. Our business operations are making an entry into the Israeli market aggressively, heralding a new milestone. In this regard, we have signed up with the Israeli company, TechLink Global Ltd, based out of Tel Aviv. Proxelera’s presence in one of the most technologically advanced countries in the world stands as a testimony to our technical prowess in the VLSI and semiconductor industry. The company belongs to the Semiconductors industry and has 51-200 employees. Our headquarters is located in Bangalore. For more information, visit our website at <a href="https://proxelera.com/" rel="noopener noreferrer" target="_blank">https://proxelera.com/</a>. Job OverviewWe are seeking a highly skilled and experienced Lead Engineer to join our team at Proxelera. This is a senior-level position based in either Bengaluru or Hyderabad, and it requires a minimum of 7 years to a maximum of 15 years of relevant work experience. This is a full-time role, and the selected candidate will be responsible for leading engineering initiatives within our cutting-edge VLSI design projects. IP Verification EngineerSoC Verification EngineerPD EngineerRTL EngineerSTA Engineer

Company OverviewProxelera’s unmatched expertise in VLSI design is expanding into new frontiers in the international market. Our business operations are making an entry into the Israeli market aggressively, heralding a new milestone. In this regard, we have signed up with the Israeli company, TechLink Global Ltd, based out of Tel Aviv. Proxelera’s presence in one of the most technologically advanced countries in the world stands as a testimony to our technical prowess in the VLSI and semiconductor industry. Job OverviewWe are seeking a highly skilled and experienced Senior Physical Design Engineer to join our team in Bangalore Urban. This is a full-time position that requires a minimum of 7 years of relevant work experience. The successful candidate will play a critical role in our VLSI design team, contributing to our ongoing projects and future innovations. Qualifications and Skills<ul><li>Minimum of 7 years of experience in physical design engineering.</li><li>Proficiency in physical design, including floorplanning, placement, and routing. (Mandatory skill)</li><li>Experience with timing closure to ensure circuit performance and reliability.</li><li>Skilled in clock tree synthesis for effective clock distribution within a chip.</li><li>Understanding of power planning strategies to manage power distribution and consumption.</li><li>Expertise in static timing analysis for verifying timing constraints and specifications.</li><li>Proven ability to handle complex VLSI design tools and methodologies.</li><li>Excellent problem-solving abilities with a detail-oriented approach.</li></ul> Roles and Responsibilities<ul><li>Lead the physical design process for multiple chip projects from concept through tapeout.</li><li>Develop and implement floorplans, ensuring optimal layout and minimizing design complexity.</li><li>Perform placement and routing tasks to achieve design objectives and performance targets.</li><li>Collaborate with the design team to achieve timing closure and meet project milestones.</li><li>Conduct clock tree synthesis to ensure efficient clock distribution and minimal skew.</li><li>Execute power planning to optimize power usage and reduce dissipation.</li><li>Run static timing analysis to validate timing requirements and resolve timing issues.</li><li>Ensure compliance with industry standards and best practices in all design phases.</li><li>Transfer knowledge and mentor junior team members, fostering a collaborative work environment.</li></ul>

Roles and Responsibilities<ul><li>Experience in design and development with structured Software. Development Life Cycle for embedded applications</li><li>Proficiency in C language or assembly programming, Micro controller, Micro Processor.</li><li>Preferably experience of working and understanding in metering domain</li><li>Proficiency in development processes, tools/IDE (KEIL, IAR, Eclipse) &amp; test automation</li><li>Unit testing skill</li><li>Interface RS485, RS232, SPI, I2C, USB, LCD, Keypad, Flash, EEPROM</li><li>Coding Standards and MISRA rules preferable</li><li>Knowledge of ARM / MIPS / Coldfire / MSP430 / DSPIC / 8051 and other popular processor</li><li>Experience of working on communication products based on DLMS, Ethernet</li><li>Sound Knowledge on MISRA Guidelines</li></ul> Desired Candidate Profile<ul><li>Understand improvement requirement and develop improvement solution &amp; package, according to technical specifications / high level solution design</li><li>Responsible to carry out effective and timely unit testing, in order to, deliver first time right solutions</li><li>Development of automation framework / emulators to speed up business delivery cycle in NPI programs</li><li>Proficiency in developing embedded software design with high reusability using relevant tools and BSM or flow diagram</li></ul>