Company Overview

Proxelera’s unmatched expertise in VLSI design is expanding into new frontiers in the international market. Our business operations are making an entry into the Israeli market aggressively, heralding a new milestone. In this regard, we have signed up with the Israeli company, TechLink Global Ltd, based out of Tel Aviv. Proxelera’s presence in one of the most technologically advanced countries in the world stands as a testimony to our technical prowess in the VLSI and semiconductor industry.

Job Overview

We are seeking a highly skilled and experienced Senior Physical Design Engineer to join our team in Bangalore Urban. This is a full-time position that requires a minimum of 7 years of relevant work experience. The successful candidate will play a critical role in our VLSI design team, contributing to our ongoing projects and future innovations.

Qualifications and Skills

• Minimum of 7 years of experience in physical design engineering.
• Proficiency in physical design, including floorplanning, placement, and routing. (Mandatory skill)
• Experience with timing closure to ensure circuit performance and reliability.
• Skilled in clock tree synthesis for effective clock distribution within a chip.
• Understanding of power planning strategies to manage power distribution and consumption.
• Expertise in static timing analysis for verifying timing constraints and specifications.
• Proven ability to handle complex VLSI design tools and methodologies.
• Excellent problem-solving abilities with a detail-oriented approach.

Roles and Responsibilities

• Lead the physical design process for multiple chip projects from concept through tapeout.
• Develop and implement floorplans, ensuring optimal layout and minimizing design complexity.
• Perform placement and routing tasks to achieve design objectives and performance targets.
• Collaborate with the design team to achieve timing closure and meet project milestones.
• Conduct clock tree synthesis to ensure efficient clock distribution and minimal skew.
• Execute power planning to optimize power usage and reduce dissipation.
• Run static timing analysis to validate timing requirements and resolve timing issues.
• Ensure compliance with industry standards and best practices in all design phases.
• Transfer knowledge and mentor junior team members, fostering a collaborative work environment.