Roles and Responsibilties:&nbsp;&nbsp;&nbsp;&nbsp;To play the role of Verification engineer at the Block level, Chip level Functional verification.·&nbsp;&nbsp;&nbsp;&nbsp;Develop verification test plans from design specifications·&nbsp;&nbsp;&nbsp;&nbsp;Development of test environments using System Verilog and UVM verification methodologies.·&nbsp;&

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Edveon Technologies

Chip Verification Engineer