Design Verification Engineer

Bangalore
Hyderabad
Full-Time
Mid-Level: 4 to 12 years
Posted on Jul 24 2024

About the Job

Skills

SystemVerilog
UVM
ASIC Verification
Verilog
Functional Verification
RTL Design
Simulation
Scripting (e.g. Python)

Company Overview

Proxelera’s unmatched expertise in VLSI design is expanding into new frontiers in the international market. Our business operations are making an entry into the Israeli market aggressively, heralding a new milestone. In this regard, we have signed up with the Israeli company, TechLink Global Ltd, based out of Tel Aviv. Proxelera’s presence in one of the most technologically advanced countries in the world stands as a testimony to our technical prowess in the VLSI and semiconductor industry. Our headquarters are located in Bangalore, India, and we have a workforce of 51-200 employees. For more information, please visit our website at https://proxelera.com/.


Job Overview

We are seeking a Mid-Level Design Verification Engineer to join our team. The ideal candidate will have a strong background in ASIC Verification with a minimum of 4 years of work experience. This full-time position is based in Bangalore or Hyderabad. As a Design Verification Engineer, you will play a critical role in verifying the design and implementation of ASICs to ensure they meet the required specifications.


Qualifications and Skills

  • Minimum of 4 years of professional experience in design verification.
  • Strong expertise in SystemVerilog (Mandatory skill).
  • Experience with UVM (Mandatory skill).
  • Proficiency in ASIC Verification (Mandatory skill).
  • Good understanding of Verilog for digital design.
  • Experience in Functional Verification to ensure complete testing and quality control.
  • Knowledge in RTL Design to help with the synthesis and simulation of designs.
  • Proficiency in Simulation for testing of models and functionality.
  • Experience in Scripting, particularly in Python, to automate verification processes.


Roles and Responsibilities

  • Develop and implement verification plans for ASIC designs.
  • Create and maintain SystemVerilog/UVM test benches for design verification.
  • Execute test cases to ensure comprehensive design testing.
  • Collaborate with design engineers to ensure design meets all specifications and requirements.
  • Debug and resolve issues found during verification and work with designers for fixes.
  • Document and report verification results and coverage metrics.
  • Continuously improve verification methodologies and processes.
  • Provide mentorship and technical guidance to junior team members as needed.

About the company

Proxelera’s unmatched expertise in VLSI design is expanding into new frontiers in the international market. Our business operations are making an entry into the Israeli market aggressively, heralding a new milestone. In this regard, we have signed up with the Israeli company, TechLink Global Ltd, based out of Tel Aviv. TechLink, headed by its president Mr Motty Houli, will be our representative i ...Show More

Industry

Semiconductors

Company Size

51-200 Employees

Headquarter

BANGALORE

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