Requirements:

• 4+ experience in Analog layouts in advanced nodes (16nm/10nm/7nm/5nm/3nm).

• Should have experience on block level, IP level and chip level layouts.

• Should have hands on experience in crating layout of critical blocks such as LDO,ADC,DAC,Bandgap,Buck and boost converters etc..

• Good understanding of analog layout fundamentals such as matching,WPE,STI,LOD,Electromigration,crosstalk,latchup etc..

• Ability to understand design constrains and implement high quality layouts.

• Strong debug and problem solving skills for LVS,DRC,Antenna and EM/IR.

• Multiple tape out support experience will be an added advantage.

• Excellent written and oral communication skills required.

• Proven experience in mentoring and guiding junior engineers.

Interested candidates, Please share me your updated profile to anand.arumugam@modernchipsolutions.com