Analog Layout:

2+ years of experience using layout design and verification tools (e.g., cadence, LVS,

rmap).

Job Description: 

Analog/RF Layout Engineer 3-8 Years

QCT RF/Analog design group is seeking an experienced Layout Engineer to fulfill both

block and project lead level roles working in a large team environment.

Responsibilities will vary depending on experience and expertise.

The layout designer will be responsible for physical design of RF and analog circuits in a fast-paced environment.

Detail custom layout including floorplan, placement, routing, verification, and release of

final database for high frequency RF circuits.

 Provide accurate schedule and plan to meet project milestone deadlines, debug complex verification errors, mentor junior

layout designers, able to lead a team to deliver high quality layout that meets design

requirements, understanding of hierarchical planning and integration, chip design from

top down and bottom up through Tapeout.

The layout designer should have strong analog layout fundamentals and focused exposure to handling multi voltage domain

circuit layouts, latchup and ESD aware layout development strategy.

MINIMUM QUALIFICATIONS:

At least 5-8 years of experience in the following: - RF high frequency circuit custom

layout at chip, block, and device levels - LNA, mixer, and VCO

Understanding layout effects on the circuit such as speed, capacitance, power and area

etc.,

Must have good communication skills and should be team player.

Scripting and automation experience is a plus.

PREFERRED QUALIFICATIONS:

-Virtuoso XL - Caliber DRC/ERC/LVS verification and debugging tools